How to properly connect signals in schematic project for QUARTUS II
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I'm forced to use schematic approach for a project (instead of VHDL).
My problem is the following: I have two buses, for instance BUS_A[3..0] and BUS_B[2..0], I would like to connect BUS_A[3] signal with BUS_B[2] signal.
How can I realize such an assignment?
EDITED:
Here is what I tried with the following error message:
ERROR message:"Bus name allowed only on bus line -- signal "DIN_1[0],DIN_2[1]"
quartus
edited Nov 24 '18 at 13:39
Larnu
22.7k51933
asked Nov 23 '18 at 14:16
Ma BeMa Be
13
add a comment |
I'm forced to use schematic approach for a project (instead of VHDL).
My problem is the following: I have two buses, for instance BUS_A[3..0] and BUS_B[2..0], I would like to connect BUS_A[3] signal with BUS_B[2] signal.
How can I realize such an assignment?
EDITED:
Here is what I tried with the following error message:
ERROR message:"Bus name allowed only on bus line -- signal "DIN_1[0],DIN_2[1]"
quartus
edited Nov 24 '18 at 13:39
Larnu
22.7k51933
asked Nov 23 '18 at 14:16
Ma BeMa Be
13
what have you tried so far? Can you post your attempt?
– DaFois
Nov 23 '18 at 15:44
I've edited the post
– Ma Be
Nov 23 '18 at 17:59
add a comment |
I'm forced to use schematic approach for a project (instead of VHDL).
My problem is the following: I have two buses, for instance BUS_A[3..0] and BUS_B[2..0], I would like to connect BUS_A[3] signal with BUS_B[2] signal.
How can I realize such an assignment?
EDITED:
Here is what I tried with the following error message:
ERROR message:"Bus name allowed only on bus line -- signal "DIN_1[0],DIN_2[1]"
quartus
edited Nov 24 '18 at 13:39
Larnu
22.7k51933
asked Nov 23 '18 at 14:16
Ma BeMa Be
13
I'm forced to use schematic approach for a project (instead of VHDL).
My problem is the following: I have two buses, for instance BUS_A[3..0] and BUS_B[2..0], I would like to connect BUS_A[3] signal with BUS_B[2] signal.
How can I realize such an assignment?
EDITED:
Here is what I tried with the following error message:
ERROR message:"Bus name allowed only on bus line -- signal "DIN_1[0],DIN_2[1]"
quartus
quartus
edited Nov 24 '18 at 13:39
Larnu
22.7k51933
asked Nov 23 '18 at 14:16
Ma BeMa Be
13
edited Nov 24 '18 at 13:39
Larnu
22.7k51933
asked Nov 23 '18 at 14:16
Ma BeMa Be
13
edited Nov 24 '18 at 13:39
Larnu
22.7k51933
edited Nov 24 '18 at 13:39
Larnu
22.7k51933
edited Nov 24 '18 at 13:39
Larnu
22.7k51933
22.7k51933
asked Nov 23 '18 at 14:16
Ma BeMa Be
13
asked Nov 23 '18 at 14:16
Ma BeMa Be
13
asked Nov 23 '18 at 14:16
Ma BeMa Be
13
13
what have you tried so far? Can you post your attempt?
– DaFois
Nov 23 '18 at 15:44
I've edited the post
– Ma Be
Nov 23 '18 at 17:59
add a comment |
what have you tried so far? Can you post your attempt?
– DaFois
Nov 23 '18 at 15:44
I've edited the post
– Ma Be
Nov 23 '18 at 17:59
what have you tried so far? Can you post your attempt?
– DaFois
Nov 23 '18 at 15:44
what have you tried so far? Can you post your attempt?
– DaFois
Nov 23 '18 at 15:44
I've edited the post
– Ma Be
Nov 23 '18 at 17:59
I've edited the post
– Ma Be
Nov 23 '18 at 17:59
add a comment |
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what have you tried so far? Can you post your attempt?
– DaFois
Nov 23 '18 at 15:44
I've edited the post
– Ma Be
Nov 23 '18 at 17:59